Bitmap Logic Simulator

This post is not about GPU, it’s about low level computing.

Long ago I wanted to make a simple simulator, which can simulate logic gates with the simplest rules.
Earlier I’ve found  WireWorld An amazing logic simulation with really simple rules. I never played with it, I found that extremely difficult, that everything is in motion in this simulation when it’s working. I wanted something, that simulates logic gates in a similar way that in TTL electronics so I came up with these simple rules:

bitmap logic simulation rules

There are only five 3×3 pixel combinations that the simulation recognizes as special features: The wire crossing and the NOT gate facing all four directions. The OR behavior can be achieved when wires are connected to each others. And 2 serially connected NOT gates act like a buffer gate.

The simulation is working well with signal feedbacks:

  • Two NOT gates connected circularly is a memory cell. At startup it will have a random 0 or 1 bit, but will never oscillate because the simulation is upgraded with some randomness when changing logic states (just like in the real world where you’ll never have two logic gates that switches in the exact same time).
  • Odd number of NOT gates in a circular chain: They make an oscillator. The more gates used, the slower is the frequency.

Here are some more circuit examples:


Master Slave JK flipflop and its compact form

ttl chips

Some 74xxx chips

Now it’s enough information about the rules of the simulation. If you’re interested, you can find the Simulator and its (Delphi XE) source in the [Download Area] up on the menu bar of this page. Current link is:  Let me see what incredible machines you can build with it! 😀

Using these instructions: [How-to-Build-an-8-Bit-Computer] I’ve managed to build a working machine that can compute the first 12 Fibonacci numbers. Well, that’s a… something… Now I have a bit more understanding on how things work under the hood… Next time I want to make it a bigger computer in order to make the classic Tetris game on it. Also it needs the simulator to be optimized 10..50x faster, but there are a lot of room for improvements in it.

So here’s the small computer on 1024×1024 resolution. First you have to click on [RESET], ant then on [RUN]. It will stop whenever a 8bit overflow happens in while calculating the Fibonacci series.


(When you load it, be patient, it take a few seconds to load and preprocess this circuit into the simulator)

Here’s a small video on how it works. Sry for bad quality.

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38 Responses to Bitmap Logic Simulator

  1. hunar says:

    i really like it .. you said it’s simple .. and it is .. but i just want you to make a video about it .. please

    • hunar says:

      i’m not saying that i don’t understand .. i actually prefer this .. i used (every circuit , icircuit) on android and (circuit wizard) on pc but i couldn’t do anything big because there was no space for all those things .. this solves everything .. thank you 😀

      • realhet says:

        Hi, I’ve put up a video of it. Bad quality, but will do. You can see the cycle counter, and the program counter, and the 4bit memory address register in motion.

        And yes, it is really simple as it can handle only NOR gates and wire crossings. Can’t be even more simple I guess. Some day I want to optimize it to run faster, to build bigger things. Now it’s so slow that a simulated 256byte RAM would run only at 1Hz on a 3GHz real-life processor 😀

        Btw, recently I got a new idea for a different simulation: using 45 degree 2 sided half-transparent mirrors. They could let through light form coming from one direction and reflect 90 degrees those that come from the other direction. And to be able to build logic, there should be special inverting mirrors. So it’s only 9 variations at every square.

      • realhet says:

        Just checked Every Circuit. Wow, that current flow simulation is awesome.

  2. hunar says:

    thanks .. but how to use that (addres and data) what to do with them … and i didn’t understand your RAM can you make 1 bit ram for me … i build something too …simple

    • realhet says:

      Here’s an 1 bit memory cell with horizontal read/write enable lines and vertical Data in/out lines.
      Also a strange latch whitch holds the result of the alu when it is written to the memory.

  3. hunar says:

    hello … i made four 8-bit registers on BUS just like in CPUs .. using your amazing program … but when you first load it and enable the registers they already have random data inside … why is that?

    • realhet says:

      This is because every gate has a different random delay time when it comes to switch the logical state of its output. Just like in real life.
      The simplest memory cell is 2 not gates connected in a circle. If they had equal propagation times, they’ll start an infinite oscillation right after the power is turned on. But with non identical not gates, one will be always a bit faster than the other and it will switch state, and this transition will cancel out the other gate and the memory cell becomes stable.
      So without this randomness it wouldn’t be possible to simulate loopbacks in the circuit.

      Non random starting for your circuit: It could be done using a reset button. Check the 8 bit cpu -> the 10 not gates, that form the clock generator and the program counter is reseted by that button at the start. I think an automatic reset functionality would not be possible in the current simulation. As there is no way to tell that the machine is powered up right now, or running long ago.

  4. hunar says:

    hello .. it’s me again … your page is now full of my questions (sorry)
    now i have another question .. i changed your ROM to make another program but i couldn’t understand SUB .. i mean ADD is 0010 – JMP is 0111 etc.. but what is SUB .. i think you didn’t mention it..

  5. hunar says:

    hello .. i’m trying to make my own CPU to fully understand how they work .. i’m now trying to make the components and make them compact .. i tried to make a more compact ram than yours but your ram was better but then i found that your ram can be 1 pixel less in height .. and i made a flip flop .. i think it’s more compact than yours and a REGISTER too .. i thought that it will be a good idea to share it here

    • realhet says:

      I made it a bit smaller: Now it’s 20×13. 😀
      But there is 2 additional not gates at the output enable logic: They are effectively doing nothing just using up more simulation power.

  6. says:

    hello @realhet how can i design a bitmap circuit . what software you use to design a bitmap ?

  7. hunar says:

    Hello .. i have a question
    what exactly 8-bit cpu means ..
    i mean .. your cpu can only adress 4 bit of memory (lda 1111) .. does that mean that it’s 4-bit .. or the size of the registers (your accumulator) should be counted .. or you should make the instruction size 12-bit so that the instruction type will take 4-bit and the adress will take 8-bit
    i couldn’t find the answer on the internet :-/

  8. realhet says:


    There’s no simple answer for this. A 8bit cpu means more or less, that it is designed to handle 8bit numbers.

    But todays cpu’s are working on many data sizes: My PC cpu has instructions to work with 8, 16, 32, 64 and 128 bit data. It accesses the physical memory by 128 bit ‘words’. The memory address width is around 40..48 bits wide. The instruction size ranging from 1 to 17(?) bytes.
    And it is called a 64bit processor.

  9. GoatSnail says:

    Hey dude! I discovered your program about 6 months ago, and I gotta say it’s been my absolute favourite way to simulate logic circuits so far!
    I’m currently studying Software Engineering in Denmark, and i’m so intrigued by the inner workings of a computer that i can’t help but try to make my own 😛 However, i have neither a garage or the tools to sit down and solder one together myself, so i’ve found this my best option so far 😛

    Right now my biggest issues are the fact that i don’t have any form of persistent data, so all programs must be hardcoded on ROM. Also the speed, as you say yourself, could use improvements (although it’s certainly a big step-up from Minecraft’s redstone :P)

    Are you planning to make updates to the tool in the future? i feel that it has potential to be a really good and simple learning tool for people who study computer architecture! 😀
    I can understand if you never got the time 🙂 But i’f theres an update coming i’m super hyped for it! 😀 Stay awesome sir ^^

  10. realhet says:


    Thx for inspiring!
    I already have plans as I want to build a 4004 4bit CPU (and the associated rom/ram. It’s an awesome design using only 4 types of chips. At first it seems weird, but when you understand it turned out to be really a good design. For example the 4 ROM select lines: they can be programmed to select 4 ROMs, or by using an external demultiplexer they can address 16 ROMs). And it will need to be much faster. Simulating the signal levels is a 8bit task that will fit well for SSE and also for MultiCore. And the simulation of the NOR gates should be event based instead of recalculatre every gate like now. Maybe it will be 20x faster and it should be enough to simulate 1024byte ram, haha. Anyways while a small computer is doing things 90% of the gates aren’t change states at all, so that should be optimized.
    Also I want smoother graphics, so I plan to use OpenGL.
    An internal paint program would be nice too with features like:
    – Drawing horizontal/vertical lines. Or even L shaped lines if the mouse moves diagonally.
    – XOR draw style (to make connections)
    – Paste operation to duplicate the selection in an n*m matrix.
    – Copy with Alt+1..9, Paste(or Recall) with 1..9. Similar to a RTS game.
    When the simulation become faster, de logic level display should be something fluorescent like a CRT monitor, so we will be able to simulate matrix displays too.
    So there are plans 😀

    And I’ve found it as a good learning tool too: For example, I’ve learned to work with latches and multi-phase clock signals. Before it was a big myth to me.

  11. Great blog! I am loving it!! Will be back later to read some more. I am bookmarking your feeds also

  12. spaceturtles says:

    The computer circuit image is too blurry and doesn’t work. Is there a less blurry version?

  13. Tigrou says:

    Hi there,

    I get interest in digital logic recently and more specifically in CPU design.
    I found your bitmap logic simulator and the 8-bit cpu and was impressed.
    I have decided to port it to C#/SDL.

    You can found the project here : (click on “release” to download binaries and examples)

    Most efforts have been put into improving simulation speed.
    One of the biggest improvement was to introduce a new component: a clock pin (this is a 3×3 square with a hole inside).
    It allows the simulator to use a new approach for evaluating the cicuit and reach very fast simulation speeds.
    As it is now, the 8-bit CPU can run at about 20000 cycles/sec on my I5 2500 cpu.
    I think it should be fast enough to create bigger projects (like a Tetris game).

    Loops as the ones used previously for generating clock signals are now forbidden (the simulator will hang up), I have adapted the cpu and clock circuits you made (look inside the archive)

  14. aspiringnewbie says:

    So far I find your work very intellectual. But..
    realhet, i am totally lost here, what software do you use and how do you draw the circuits and circuit elements? for example an AND gate? the images I found on the comment section seem very small, how do you do such things? Thank you in advanced.

  15. aspiringnewbie says:

    Also, can i ask what File refresh interval, simulation refresh interval and number of simulation process are for? I have an idea but i really wanted an explanation from you. I am sorry for my noob questions, I hope you’ll notice them.

    • realhet says:

      You can use any paint programs. For example the Windows Paint, or Paint .Net is good too. Although, you have to zoom in to see the pixels well. FileRefresh: It will check the file whenever you save it in the paint program at this interval. simulation refresh: you can speed up or slow down the simulation. One value controls frames per sec, and the other controls the number of calculations in each frame.

  16. GOKOP says:

    Your program doesn’t work for me. 😦
    I open it, select a file and nothing happens. I tried opening your cpu, program freezes for a while so it’s propably indeed loading something, but then again, nothing. That’s kind of irritating because I was looking for this kind of software for some time and also it seems like nobody else is having this problem. :/

    • realhet says:

      What CPU you have? I’m not sure, but my framework may use SSE3 instructions, that can be a problem only on earlier CPUs.
      You also need file rights in the exe’s directory for an .ini file!

  17. Very enjoyable. I’ve been thinking about how to make composite gates smaller and found an alternative (rather stylish) pattern rule for NOT that permits better compaction. Check it out: (I hope I made no mistake. I like particularly how that XOR gate turned out.)

    • Also, I was trying to engineer a smaller JK Flip flop, and somehow following the online diagrams doesn’t work; the switch-action is completely glitchy. Your JK FF on the other hand does look nothing like the diagram. Can you explain why you built it the way you did?

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